Last modified: Tue Jun 30 11:09:46 UTC+0200 2026 © A. Tarpai

LDS, LES and LSS/LFS/LGS

8086 LDS, LES

8086 could load a full address (offset+segment) from memory into a 16-bit GP-reg (AX,BX,CX,DX and SI,DI,BP,SP) and the DS or ES Segment Register.

The [mem] operand offset points to two WORDS in memory: REG (low address) and DS/ES (high address).

One opcode:

1100010D  MODR/M

D=0 load HI WORD into ES
D=1 load HI WORD into DS

C4     LES reg, mem
C5     LDS reg, mem

MOD MUST BE memory reference (00 01 10)

          +----------+ +----------+ +--
[mem] --> |   WORD   | |   WORD   | |   ..     MEMORY
          +----------+ +----------+ +--
               |            |
               v            v
              REG         DS/ES

The memory layout for far pointers are always the same for the cpu: low address is register, high address is segment register. Eg. same for indirect JMP or how far pointers are pushed on stack by far CALL, interrupts:

15         0
+----------+
|   FLAGS  |
+----------+
|    CS    |
+----------+
|    IP    |  <--- SP
+----------+
|          |
    stack

386 LDS, LES and LSS/LFS/LGS

386 added new 0F two byte opcodes to load also SS and the new SR-s (FS/GS). In native 32-bit mode the [mem] operand offset points to a 6-byte structure in memory: 32-bit REG (LO) and 16-bit SR (HI).

Opcodes:

C5     MODR/M    LDS reg, mem
C4     MODR/M    LES reg, mem
0F B2  MODR/M    LSS reg, mem  <-- particularly useful to load SS:(E)SP in an atomic operation
0F B4  MODR/M    LFS reg, mem
0F B5  MODR/M    LGS reg, mem

MOD MUST BE memory reference (00 01 10)


          +--------------------+ +----------+ +--
[mem] --> |       DWORD        | |   WORD   | |   ..     MEMORY
          +--------------------+ +----------+ +--
                    |                 |
                    v                 v
                   REG          DS/ES/SS/FS/GS

All instructions honor the 66h operand-size prefix:

operand-size = 16                operand-size = 32
D=0 or D=1 and 66h               D=1 or D=0 and 66h

+----------+ +----------+        +--------------------+ +----------+
|   WORD   | |   WORD   |        |        DWORD       | |   WORD   |
+----------+ +----------+        +--------------------+ +----------+
     |            |                         |                |
     v            v                         v                v
   REG16    DS/ES/SS/FS/GS                REG32        DS/ES/SS/FS/GS

Example a 32-bit register can be loaded from memory in real mode:

            [BITS 16]

   C5 07    LDS AX, [BX]
66 C5 07    LDS EAX, [BX]